As there is a growing need for faster processing of large volumes of data in financial industries, data processing systems based on clusters relying on general-purpose CPUs show a number of limitations. Indeed, if cluster approaches involve inexpensive hardware and provide tools that simplify the development, they have a number of constraints which are all the more significant as the requirement for high performance computing increases: high electricity consumption, costly maintenance, important space required for data centers. Further, the overall performance obtained with a cluster does not increase proportionally with the number of clusters. Unlike the cluster approach, data processing systems based on FPGAs allow execution of complex tasks in parallel with an important throughput, with a limited number of machines equipped with FPGAs. Accordingly, this hardware approach appears particularly suitable for the development of applications in the field of financial and investment industries where fast calculation is key to remain competitive.
An FPGA (acronym for Field-programmable gate array) designates an integrated circuit which can be configured after manufacturing. The configuration is generally specified using a hardware description language (HDL). FPGAs contain a huge number of programmable logic components (“logic blocks”), and a hierarchy of reconfigurable interconnections that allow the blocks to be “wired together”. Logic blocks can be configured to perform complex combinational functions, or merely simple basic logical operations (boolean AND, OR, NAND, XOR etc.). As FPGA can perform parallel calculations, a same algorithm can be executed simultaneously for a number of independent inputs in only a few clock cycles. FPGAs are thus particularly suited for executing complex computation very fast.
For these reasons, more and more market data processing systems are designed using FPGAs.
Market data processing systems generally comprise an order management device for storing the details related to each financial order identified in the input commands in a data structure, such as a hash table. The order management device further manages the access to this data structure depending on the input commands. For example, the order management structure may add an order to the data structure if an add command identifying an order is received, or delete an order from the data structure if a delete command is received.
However, current order management devices provide poor performance and are not able to withstand the operation rate associated with the 10 Gb/s throughput of the latest network connections. A known approach to overcome such deficiencies is to spread the load over several servers, each processing only a part of the data feed. However, this increases the total system's latency, which is not desirable.
As a result, this creates a need for an improved order management device based on hardware solutions (hardware acceleration), in particular solutions built around FPGAs.